
Synchronous SRAM chip, 72M-bit density, featuring a 2M x 36 configuration with a dual-port architecture. Offers a maximum access time of 0.45 ns and a maximum clock rate of 633 MHz, utilizing QDR data rate architecture. Operates at 1.8V with a voltage range of 1.7V to 1.9V. Packaged in a 165-pin FBGA (Fine Pitch Ball Grid Array) for surface mounting, with dimensions of 15mm x 13mm x 0.89mm and a 1mm pin pitch.
Cypress CY7C2565XV18-633BZXCT technical specifications.
Download the complete datasheet for Cypress CY7C2565XV18-633BZXCT to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.