P-channel enhancement mode power MOSFET, 40V drain-source voltage, 6A continuous drain current. Features 33mOhm maximum drain-source resistance at 10V Vgs. Housed in a 6-pin UDFN EP package with exposed pad, measuring 2x2x0.57mm, suitable for surface mounting. Includes typical gate charge of 23.2nC at 10V and input capacitance of 1382pF at 20V. Maximum power dissipation is 2100mW, operating temperature range from -55°C to 150°C.
PackageUDFN EP
MountingSurface Mount
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Technical Specifications
Diodes DMP4047LFDE-7 technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DFN |
| Package/Case | UDFN EP |
| Package Description | Micro Dual Flat Package No Lead, Exposed Pad |
| Lead Shape | No Lead |
| Pin Count | 6 |
| PCB | 6 |
| Package Length (mm) | 2 |
| Package Width (mm) | 2 |
| Package Height (mm) | 0.57 |
| Seated Plane Height (mm) | 0.6 |
| Pin Pitch (mm) | 0.65 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Configuration | Single Quad Drain |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | P |
| Number of Elements per Chip | 1 |
| Maximum Drain Source Voltage | 40V |
| Maximum Gate Source Voltage | ±20V |
| Maximum Continuous Drain Current | 6A |
| Maximum Gate Threshold Voltage | 2.2V |
| Maximum Drain Source Resistance | 33@10VmOhm |
| Typical Gate Charge @ Vgs | 23.2@10V|[email protected]nC |
| Typical Gate Charge @ 10V | 23.2nC |
| Typical Input Capacitance @ Vds | 1382@20VpF |
| Maximum Power Dissipation | 2100mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
Compliance
| Cage Code | 6M0U4 |
| EU RoHS | Yes |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Diodes DMP4047LFDE-7 Datasheet
Download the complete datasheet for Diodes DMP4047LFDE-7 to view detailed technical specifications.
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