Dual JK Flip-Flop, CMOS, 60MHz, SOIC
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with eset 14-SOIC -55 to 125
Dual JK Flip-Flop, CMOS, Negative Edge, 35MHz, SOIC
Dual J-K Flip-Flop, 60MHz, CMOS, SOIC, Neg-Edge Trigger
Dual JK Flip-Flop, CMOS, Neg-Edge Trigger, 35MHz, SOIC
CD74HC107M96