Dual JK Flip-Flop, CMOS, Negative Edge, 35MHz, SOIC
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with eset 14-SOIC -55 to 125
Dual JK Flip-Flop, CMOS, 60MHz, Negative Edge, SOIC
Dual J-K Flip-Flop, 35MHz, SOIC, CMOS, Negative Edge Triggered
