J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDIP16, 0.300 INCH, PLASTIC, MS-001, DIP-16
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Fairchild DM74LS112AN technical specifications.
| Max Operating Temperature | 70 |
| Number of Terminals | 16 |
| Min Operating Temperature | 0 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDIP-T16 |
| Width | 7.62 |
| Length | 19.305 |
| Pin Count | 16 |
| Number of Functions | 2 |
| Temperature Grade | COMMERCIAL |
| Supply Voltage-Nom (Vsup) | 5 |
| Supply Voltage-Max (Vsup) | 5.25 |
| Supply Voltage-Min (Vsup) | 4.75 |
| Logic IC Type | J-K FLIP-FLOP |
| Family | LS |
| Propagation Delay (tpd) | 28 |
| Number of Bits | 2 |
| Max I(ol) | 0.008 |
| Output Polarity | COMPLEMENTARY |
| Power Supply Current-Max (ICC) | 6 |
| Trigger Type | NEGATIVE EDGE |
| fmax-Min | 25 |
| Max Frequency@Nom-Sup | 25000000 |
| RoHS | No |
| HTS Code | 8542.39.00.01 |
| REACH | unknown |
| Military Spec | False |
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