The integrated processor combines a CPU32 M68000-family core, a two-channel DMA controller, serial communications, timers, and system-integration logic on one device. It supports a 16-bit external data bus, 32 address lines, and a 4 Gbyte linear address space. The DMA controller supports single- or dual-address transfers with 8-, 16-, and 32-bit data movement in applicable modes. Dual full-duplex USART channels, two 16-bit counter/timers, programmable chip selects, JTAG boundary scan, and power-management modes are integrated for embedded control systems.
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| Processor core | CPU32, MC68020-derived 32-bit core |
| Instruction compatibility | Upward object-code compatible with MC68000 and MC68010 |
| Maximum operating frequency | 25.16MHz |
| Operating frequency range | 0 to 16.78 or 0 to 25.16MHz |
| Performance at 25.16 MHz | 4 VAX-equivalentMIPS |
| Dhrystone performance at 25.16 MHz | 10045Dhrystones/s |
| Address bus width | 32bits |
| External data bus width | 16bits |
| Linear address space | 4Gbyte |
| DMA channels | 2 independent programmable channels |
| DMA address and counter width | 32bits |
| DMA transfer data widths | 8, 16, and 32bits |
| Maximum DMA single-address transfer rate | Nearly 50 at 25.16 MHzMbyte/s |
| Maximum DMA dual-address transfer rate | 12.5 at 25.16 MHzMbyte/s |
| Serial interface | Two-channel full-duplex USART |
| Maximum serial transfer rate | 9.8Mbit/s |
| Counter/timers | Two independent 16-bit counter/timers with up to 8-bit prescaler |
| Timer resolution | 80 at 25 MHzns |
| Chip selects | 4 programmable chip-select outputs |
| Discrete I/O lines | Up to 16 |
| Boundary scan | IEEE 1149.1 JTAG |
| Supply voltage options | 5.0 ±5%; 3.3 ±0.3 for MC68340VV |
| Operating temperature options | 0 to 70; -40 to 85 on selected variants°C |
| Typical power consumption | 500 at 16.78 MHz; 750 at 25 MHzmW |
| Standby power in LPSTOP | About 300µW |
| NXP orderable terminal count | 144pins |
| Rohs Certificate Of Analysis | Yes for current NXP orderable variants checked |
| Pb-free | Yes for current NXP orderable variants checked |
| Halogen-free | Yes for current NXP orderable variants checked |
| REACH | NXP REACH statement referenced for current NXP orderable variants checked |
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