Synchronous SRAM chip, 72M-bit density, featuring a dual-port, QDR architecture with a pipelined design. Offers a maximum access time of 0.45 ns and a maximum clock rate of 350 MHz. Operates at a typical supply voltage of 1.8V, with a voltage range of 1.7V to 1.9V. Packaged in a 165-pin Fine Pitch Ball Grid Array (FBGA) for surface mounting, with dimensions of 15mm x 13mm x 0.94mm.
GSI GS8662DT07BD-350 technical specifications.
Download the complete datasheet for GSI GS8662DT07BD-350 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.