Asynchronous SRAM chip, 64K bit density, organized as 8K x 8 words. Features a maximum access time of 150 ns and operates at a typical 5V supply voltage. This component is housed in a 28-pin PDIP package with through-hole mounting and a pin pitch of 2.54 mm.
PackagePDIP
MountingThrough Hole
Quick Jump:
Technical Specifications
Kioxia TC5564APL-15(MATS) technical specifications.
General
Basic Package Type
Through Hole
Package Family Name
DIP
Package/Case
PDIP
Package Description
Plastic Dual In Line Package
Lead Shape
Through Hole
Pin Count
28
PCB
28
Package Length (mm)
37
Package Width (mm)
14
Package Height (mm)
4
Seated Plane Height (mm)
5
Pin Pitch (mm)
2.54
Package Material
Plastic
Mounting
Through Hole
Jedec
MS-011AB
Density
64Kbit
Address Bus Width
13bit
Maximum Access Time
150ns
Timing Type
Asynchronous
Density in Bits
65536bit
Typical Operating Supply Voltage
5V
Number of Bits per Word
8bit
Number of Ports
1
Number of Words
8K
Compliance
EU RoHS
Yes
HTS Code
8542320041
Schedule B
8542320040
ECCN
EAR99
RoHS Versions
2011/65/EU
Datasheet
Kioxia TC5564APL-15(MATS) Datasheet
Download the complete datasheet for Kioxia TC5564APL-15(MATS) to view detailed technical specifications.
No datasheet is available for this part.