Synchronous SRAM chip, 2M-bit density, organized as 64K words by 32 bits. Features a 7ns maximum access time and a 66MHz maximum clock rate with SDR data rate architecture. Operates at a 3.3V supply voltage, with a range of 3.1V to 3.6V. Packaged in a 100-pin LQFP (Low Profile Quad Flat Package) with gull-wing leads for surface mounting.
PackageLQFP
MountingSurface Mount
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Technical Specifications
Kioxia TC55V2325FF-7(G,FJ technical specifications.
General
Basic Package Type
Lead-Frame SMT
Package Family Name
QFP
Package/Case
LQFP
Package Description
Low Profile Quad Flat Package
Lead Shape
Gull-wing
Pin Count
100
PCB
100
Package Length (mm)
20
Package Width (mm)
14
Package Height (mm)
1.4
Package Material
Plastic
Mounting
Surface Mount
Density
2Mbit
Address Bus Width
16bit
Maximum Access Time
7ns
Timing Type
Synchronous
Maximum Clock Rate
66MHz
Data Rate Architecture
SDR
Density in Bits
2097152bit
Maximum Operating Current
200mA
Typical Operating Supply Voltage
3.3V
Number of Bits per Word
32bit
Number of Ports
1
Number of Words
64K
Min Operating Supply Voltage
3.1V
Max Operating Supply Voltage
3.6V
Min Operating Temperature
0°C
Max Operating Temperature
70°C
Architecture
Pipelined
Compliance
EU RoHS
Yes
HTS Code
8542320041
Schedule B
8542320040
ECCN
3A991.b.2.a
RoHS Versions
2011/65/EU
Datasheet
Kioxia TC55V2325FF-7(G,FJ Datasheet
Download the complete datasheet for Kioxia TC55V2325FF-7(G,FJ to view detailed technical specifications.
No datasheet is available for this part.