Synchronous SRAM chip, 2M-bit density, organized as 64K words by 32 bits. Features a 7ns maximum access time and a 66MHz maximum clock rate with SDR data rate architecture. Housed in a 100-pin LQFP package with gull-wing leads for surface mounting. Operates at 3.3V typical supply voltage, with a 16-bit address bus and pipelined architecture.
Kioxia TC55V2325FF-7(GINE technical specifications.
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