Complex Programmable Logic Device (CPLD) with 2000 gates and 64 macrocells. Features 32 I/Os, 16 logic blocks, and 28 programmable I/Os. Operates at a maximum frequency of 125MHz with a 12.5ns propagation delay. Designed for surface mounting in a 44-pin TQFP package, utilizing EEPROM memory technology and a 5V operating supply voltage.
Frequency125MHz
PackageTQFP
Current91mA
MountingSurface Mount
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Technical Specifications
Lattice Semiconductor ISPLSI1016EA-100LT44 technical specifications.
General
| Package/Case | TQFP |
| Frequency | 125MHz |
| Max Frequency | 125MHz |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Max Supply Voltage | 5.25V |
| Memory Type | EEPROM, |
| Min Supply Voltage | 4.75V |
| Mount | Surface Mount |
| Number of Gates | 2000 |
| Number of I/Os | 32 |
| Number of Logic Blocks (LABs) | 16 |
| Number of Logic Elements/Cells | 16 |
| Number of Macrocells | 64 |
| Number of Programmable I/O | 28 |
| Operating Supply Current | 91mA |
| Operating Supply Voltage | 5V |
| Package Quantity | 160 |
| Packaging | Tray |
| Propagation Delay | 12.5ns |
| Radiation Hardening | No |
| RoHS Compliant | No |
| Series | ispLSI® 1000EA |
| Supply Current | 91mA |
| Turn-On Delay Time | 12.5ns |
Compliance
| RoHS | Not CompliantNo |
Datasheet
Lattice Semiconductor ISPLSI1016EA-100LT44 Datasheet
Download the complete datasheet for Lattice Semiconductor ISPLSI1016EA-100LT44 to view detailed technical specifications.
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