CMOS EE PLD with 25ns propagation delay, operating at up to 83MHz. Features 4000 gates, 64 macrocells, 24 logic elements, and 48 programmable I/Os. Designed for surface mounting in a PQCC68 package, with an operating temperature range of 0°C to 70°C and a supply voltage of 4.75V to 5.25V.
Frequency83MHz
PackagePLCC
Current190mA
MountingSurface Mount
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Technical Specifications
Lattice Semiconductor ISPLSI1024-60LJ technical specifications.
General
| Package/Case | PLCC |
| Frequency | 83MHz |
| Max Frequency | 83MHz |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Max Supply Voltage | 5.25V |
| Memory Type | EEPROM, |
| Min Supply Voltage | 4.75V |
| Mount | Surface Mount |
| Number of Gates | 4000 |
| Number of I/Os | 48 |
| Number of Logic Blocks (LABs) | 24 |
| Number of Logic Elements/Cells | 24 |
| Number of Macrocells | 64 |
| Number of Programmable I/O | 48 |
| Operating Supply Current | 190mA |
| Operating Supply Voltage | 5V |
| Package Quantity | 18 |
| Packaging | Rail/Tube |
| Propagation Delay | 25ns |
| Radiation Hardening | No |
| RoHS Compliant | No |
| Series | ispLSI® 1000 |
| Supply Current | 190mA |
| Turn-On Delay Time | 25ns |
Compliance
| RoHS | Not CompliantNo |
Datasheet
Lattice Semiconductor ISPLSI1024-60LJ Datasheet
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