High-performance EE PLD featuring 96 macrocells and 4000 gates. Operates at a maximum frequency of 100MHz with a propagation delay of 20ns. This CMOS device supports a wide operating voltage range of 4.75V to 5.25V and is housed in a 68-pin PLCC package for surface mounting. It offers 48 programmable I/Os and operates within a temperature range of 0°C to 70°C.
Lattice Semiconductor ISPLSI1024-80LJ technical specifications.
| Package/Case | PLCC |
| Frequency | 100MHz |
| Max Frequency | 100MHz |
| Max Operating Temperature | 70°C |
| Memory Type | EEPROM, |
| Min Operating Temperature | 0°C |
| Max Supply Current | 190mA |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Mount | Surface Mount |
| Number of Gates | 4000 |
| Number of I/Os | 48 |
| Number of Inputs | 48 |
| Number of Logic Blocks (LABs) | 24 |
| Number of Logic Elements/Cells | 24 |
| Number of Macrocells | 96 |
| Number of Programmable I/O | 48 |
| Operating Supply Current | 190mA |
| Operating Supply Voltage | 5V |
| Package Quantity | 540 |
| Packaging | Rail/Tube |
| Propagation Delay | 20ns |
| Reach SVHC Compliant | No |
| RoHS Compliant | No |
| Supply Current | 190mA |
| Termination | SMD/SMT |
| RoHS | Not Compliant |
Download the complete datasheet for Lattice Semiconductor ISPLSI1024-80LJ to view detailed technical specifications.
No datasheet is available for this part.