EE PLD, 128-macrocell, 32-logic-block CPLD featuring 6000 gates and 64 I/Os. Operates at a maximum frequency of 100MHz with a propagation delay of 12.5ns. This surface mount device supports a supply voltage range of 4.75V to 5.25V and operates between 0°C and 70°C. It utilizes EEPROM memory technology and is packaged in a TQFP form factor.
Lattice Semiconductor ISPLSI1032EA-100LT100 technical specifications.
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