Complex Programmable Logic Device (CPLD) featuring 128 macrocells and 32 logic blocks. Offers 64 I/Os with 28 programmable I/Os, operating at a maximum frequency of 200MHz. This surface mount component utilizes EEPROM memory and has a propagation delay of 6ns. Designed for a 5V operating supply voltage, it is housed in a 100-TQFP package.
Lattice Semiconductor ISPLSI1032EA-200LT100 technical specifications.
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