Complex Programmable Logic Device (CPLD) with 8000 gates and 192 macrocells. Features 96 programmable I/Os, 48 logic blocks, and a maximum operating frequency of 50MHz. Operates from a 4.75V to 5.25V supply voltage with a typical 5V requirement. Surface mountable in a 128-pin PQFP package, offering a propagation delay of 26ns.
Frequency58.8MHz
PackagePQFP
Current235mA
MountingSurface Mount
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Technical Specifications
Lattice Semiconductor ISPLSI1048C-50LQ technical specifications.
General
| Package/Case | PQFP |
| Frequency | 58.8MHz |
| Max Frequency | 50MHz |
| Max Operating Temperature | 70°C |
| Memory Type | EEPROM, |
| Min Operating Temperature | 0°C |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Mount | Surface Mount |
| Number of Gates | 8000 |
| Number of I/Os | 96 |
| Number of Logic Blocks (LABs) | 48 |
| Number of Logic Elements/Cells | 48 |
| Number of Macrocells | 192 |
| Number of Programmable I/O | 96 |
| Operating Supply Current | 235mA |
| Operating Supply Voltage | 5V |
| Package Quantity | 24 |
| Packaging | Tray |
| Propagation Delay | 26ns |
| Radiation Hardening | No |
| RoHS Compliant | No |
| Series | ispLSI® 1000 |
| Supply Current | 235mA |
| Turn-On Delay Time | 26ns |
Compliance
| RoHS | Not CompliantNo |
Datasheet
Lattice Semiconductor ISPLSI1048C-50LQ Datasheet
Download the complete datasheet for Lattice Semiconductor ISPLSI1048C-50LQ to view detailed technical specifications.
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