Complex Programmable Logic Device (CPLD) featuring 8000 gates and 192 macrocells. Offers 96 programmable I/Os and operates at a maximum frequency of 125MHz. This surface mount device utilizes EEPROM memory technology and has a propagation delay of 10ns. Designed for 5V operation with a supply voltage range of 4.75V to 5.25V, it is RoHS compliant and packaged in PQFP.
Lattice Semiconductor ISPLSI1048E-125LQN technical specifications.
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