Complex Programmable Logic Device (CPLD) featuring 4000 gates and 96 macrocells. Operates at a maximum frequency of 100MHz with a propagation delay of 13ns. Supports a wide operating voltage range of 4.75V to 5.25V and a maximum operating temperature of 70°C. This surface mount device is housed in a 128-pin PQFP package.
Lattice Semiconductor ISPLSI2096E-100LQ128 technical specifications.
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