CMOS EE PLD with 32 macrocells and 3.5ns propagation delay. Features 36 logic elements, 2 logic blocks, and 800 gates. Operates at 1.7V to 1.9V with a typical supply current of 50uA. Supports surface mount installation with a PBGA56 package. RoHS compliant and lead-free.
Lattice Semiconductor LC4032ZC-35MN56C technical specifications.
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