Programmable Logic Device (PLD) featuring 64 macrocells and 36 logic array blocks (LABs) within a 64-cell architecture. Offers a 5ns propagation delay and 5ns turn-on delay, operating at a maximum frequency of 250MHz. This CMOS device supports a wide operating temperature range from -40°C to 105°C and a supply voltage of 1.7V to 1.9V. It includes 32 I/Os and is available in a TQFP surface mount package. RoHS compliant and lead-free.
Lattice Semiconductor LC4064ZC-5TN48I technical specifications.
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