Programmable Logic Device (PLD) featuring 256 macrocells and 36 logic array blocks (LABs). Offers 64 I/Os with 128 programmable I/Os, operating at a maximum frequency of 322MHz. This CMOS device has a propagation delay of 3ns and supports a supply voltage range of 3V to 3.6V. Packaged in a TQFP format for surface mounting, it operates between 0°C and 90°C.
Lattice Semiconductor LC4256V-3T100C technical specifications.
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