Complex Programmable Logic Device (CPLD) featuring 256 macrocells and 36 logic array blocks (LABs). Offers 128 I/Os with 272 programmable I/O pins, operating at a maximum frequency of 322MHz. This surface mount device utilizes EEPROM memory and has a propagation delay of 3ns. Designed for a 3.3V operating supply voltage, it functions within a temperature range of 0°C to 90°C.
Lattice Semiconductor LC4256V-3T176C technical specifications.
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