Complex Programmable Logic Device (CPLD) featuring 768 macrocells and 225K gates, operating at up to 250MHz. This surface mount device offers 193 I/Os, with 100 programmable I/Os, and a propagation delay of 7.5ns. It supports a 3.3V operating supply voltage, with a range of 3V to 3.6V, and operates within a temperature range of -40°C to 105°C. The CPLD includes 393216 bits of RAM and is packaged in a 256-pin FBGA.
Lattice Semiconductor LC5768MV-75F256I technical specifications.
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