MachXO2 family Complex Programmable Logic Device (CPLD) featuring 256 logic cells and 22 user I/Os. This surface-mount device utilizes a 32-pin QFN EP package with an exposed pad, measuring 5mm x 5mm x 0.84mm. Operating at a typical 1.2V supply voltage, it offers in-system programmability via Flash memory. Suitable for applications requiring flexible logic implementation within a compact footprint.
PackageQFN EP
MountingSurface Mount
Quick Jump:
Technical Specifications
Lattice Semiconductor LCMXO2-256ZE-2SG32CES technical specifications.
General
Basic Package Type
Non-Lead-Frame SMT
Package Family Name
QFN
Package/Case
QFN EP
Package Description
Quad Flat No Lead Package, Exposed Pad
Lead Shape
No Lead
Pin Count
32
PCB
32
Package Length (mm)
5
Package Width (mm)
5
Package Height (mm)
0.84
Seated Plane Height (mm)
0.85
Pin Pitch (mm)
0.5
Package Material
Plastic
Mounting
Surface Mount
Family Name
MachXO2
Device Logic Cells
256
RAM Bits
0Kbit
Number of User I/Os
22
Program Memory Type
Flash
Min Operating Temperature
0°C
Max Operating Temperature
85°C
Typical Operating Supply Voltage
1.2V
Min Operating Supply Voltage
1.14V
Programmability
Yes
In-System Programmability
Yes
Speed Grade
2
Compliance
Cage Code
66675
EU RoHS
Yes
HTS Code
8542390001
Schedule B
8542390000
Automotive
No
AEC Qualified
No
PPAP
No
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Lattice Semiconductor LCMXO2-256ZE-2SG32CES Datasheet
Download the complete datasheet for Lattice Semiconductor LCMXO2-256ZE-2SG32CES to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.