Programmable Logic Device (PLD) featuring 128 macrocells and 5000 gates. This CMOS device operates with a maximum frequency of 182MHz and a propagation delay of 15ns. It supports a supply voltage range of 4.75V to 5.25V and is designed for surface mounting in a PQCC84 package. The PLD offers 64 programmable I/O pins and operates within a temperature range of 0°C to 70°C.
Lattice Semiconductor M4-128N/64-15JC technical specifications.
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