Complex Programmable Logic Device (CPLD) featuring 32 macro cells and 1.25K gates, operating at a maximum frequency of 100MHz. This surface mount component utilizes EEPROM memory and offers 32 I/Os. It operates from a 5V supply voltage, with a minimum of 4.75V and a maximum of 5.25V, and has a propagation delay of 10ns. Packaged in a 44-pin TQFP tray, it is RoHS compliant and lead-free, with an operating temperature range of 0°C to 70°C.
Lattice Semiconductor M4A5-32/32-10VNC technical specifications.
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