Field Programmable Gate Array (FPGA) with 21,600 system gates and 784 logic cells. Features 724 registers, 12.3 Kbit RAM, and 163 user I/Os. Operates at 250MHz with 0.3um process technology and 3.3V supply. Packaged in a 208-pin SQFP (Shrink Quad Flat Package) with gull-wing leads for surface mounting.
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Lattice Semiconductor OR2T08A4S208 technical specifications.
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | SQFP |
| Package Description | Shrink Quad Flat Packages |
| Lead Shape | Gull-wing |
| Pin Count | 208 |
| PCB | 208 |
| Package Length (mm) | 28 |
| Package Width (mm) | 28 |
| Package Height (mm) | 3.4 |
| Seated Plane Height (mm) | 4.1(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | ORCA Series 2 |
| Maximum Number of User I/Os | 163 |
| Number of Registers | 724 |
| RAM Bits | 12.3Kbit |
| Device Logic Cells | 784 |
| Number of Look-up Table Input | 4 |
| Process Technology | 0.3um |
| Device System Gates | 21600 |
| Programmability | Yes |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
| Speed Grade | 4 |
| Cage Code | 66675 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
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