Simple Programmable Logic Device (SPLD) featuring 10 macro cells and 10 user I/Os. Operates at a maximum internal frequency of 125 MHz with a typical supply voltage of 5V. Housed in a 28-pin PLCC (Plastic Leaded Chip Carrier) package with J-lead surface mount configuration. Offers 16 product terms per macro and a maximum propagation delay of 10 ns.
PackagePLCC
MountingSurface Mount
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Technical Specifications
Lattice Semiconductor PALCE22V10H-10JC/5 technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | LCC |
| Package/Case | PLCC |
| Package Description | Plastic Leaded Chip Carrier |
| Lead Shape | J-Lead |
| Pin Count | 28 |
| PCB | 28 |
| Package Length (mm) | 11.5 |
| Package Width (mm) | 11.5 |
| Package Height (mm) | 3.68(Min) |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-018AB |
| Family Name | PAL |
| Number of Macro Cells | 10 |
| Maximum Number of User I/Os | 10 |
| Number of Product Terms per Macro | 16 |
| Typical Operating Supply Voltage | 5V |
| Min Operating Supply Voltage | 4.75V |
| Max Operating Supply Voltage | 5.25V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 75°C |
| Programmability | Yes |
| Maximum Internal Frequency | 125MHz |
| Maximum Operating Current | 120mA |
| Maximum Propagation Delay Time | 10ns |
Compliance
| Cage Code | 66675 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Lattice Semiconductor PALCE22V10H-10JC/5 Datasheet
Download the complete datasheet for Lattice Semiconductor PALCE22V10H-10JC/5 to view detailed technical specifications.
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