This 28-pin PLCC Simple Programmable Logic Device (SPLD) features 10 macro cells and 10 user I/Os, operating at a maximum internal frequency of 38.5 MHz. It supports a typical operating supply voltage of 5V, with a range of 4.5V to 5.5V. The device offers 16 product terms per macro and a maximum propagation delay of 25 ns. Designed for surface mounting, it utilizes a J-lead configuration within a plastic leaded chip carrier package.
Lattice Semiconductor PALCE22V10Z-25JI technical specifications.
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | LCC |
| Package/Case | PLCC |
| Package Description | Plastic Leaded Chip Carrier |
| Lead Shape | J-Lead |
| Pin Count | 28 |
| PCB | 28 |
| Package Length (mm) | 11.5 |
| Package Width (mm) | 11.5 |
| Package Height (mm) | 3.68(Min) |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-018AB |
| Family Name | PAL |
| Number of Macro Cells | 10 |
| Maximum Number of User I/Os | 10 |
| Number of Product Terms per Macro | 16 |
| Typical Operating Supply Voltage | 5V |
| Min Operating Supply Voltage | 4.5V |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| Programmability | Yes |
| Maximum Internal Frequency | 38.5MHz |
| Maximum Operating Current | 120mA |
| Maximum Propagation Delay Time | 25ns |
| Cage Code | 66675 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Lattice Semiconductor PALCE22V10Z-25JI to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.