Async SRAM chip, 1M-bit density (128K x 8 words), featuring a 35ns maximum access time. This surface-mount component operates with a 5V supply voltage (4.5V-5.5V range) and has a 17-bit address bus. Packaged in a 36-pin TFBGA with 0.75mm pitch, it offers a 1M-bit density and operates between -20°C and 80°C.
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Lyontek LY621024GL-35LLE technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | TFBGA |
| Package Description | Thin Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 36 |
| PCB | 36 |
| Package Length (mm) | 8 |
| Package Width (mm) | 6 |
| Package Height (mm) | 0.94(Max) |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.75 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 1Mbit |
| Address Bus Width | 17bit |
| Maximum Access Time | 35ns |
| Timing Type | Asynchronous |
| Density in Bits | 1048576bit |
| Maximum Operating Current | 80mA |
| Typical Operating Supply Voltage | 5V |
| Number of Bits per Word | 8bit |
| Number of Ports | 1 |
| Number of Words | 128K |
| Min Operating Supply Voltage | 4.5V |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | -20°C |
| Max Operating Temperature | 80°C |
| EU RoHS | Yes |
| HTS Code | 8542320041 |
| Schedule B | 8542320040 |
| ECCN | EAR99 |
| RoHS Versions | 2011/65/EU, 2015/863 |
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