Async SRAM chip, 1M-bit density, organized as 128K x 8 bits. Features a 55ns maximum access time and operates from a 4.5V to 5.5V supply, with a typical 5V. Housed in a 36-pin TFBGA package with a 0.75mm pin pitch, measuring 8mm x 6mm x 0.94mm. Surface mountable with a 17-bit address bus width and a maximum operating current of 60mA. Operates within a temperature range of -20°C to 80°C.
PackageTFBGA
MountingSurface Mount
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Technical Specifications
Lyontek LY621024GL-55LLE technical specifications.
General
Basic Package Type
Ball Grid Array
Package Family Name
BGA
Package/Case
TFBGA
Package Description
Thin Fine Pitch Ball Grid Array
Lead Shape
Ball
Pin Count
36
PCB
36
Package Length (mm)
8
Package Width (mm)
6
Package Height (mm)
0.94(Max)
Seated Plane Height (mm)
1.2(Max)
Pin Pitch (mm)
0.75
Package Material
Plastic
Mounting
Surface Mount
Density
1Mbit
Address Bus Width
17bit
Maximum Access Time
55ns
Timing Type
Asynchronous
Density in Bits
1048576bit
Maximum Operating Current
60mA
Typical Operating Supply Voltage
5V
Number of Bits per Word
8bit
Number of Ports
1
Number of Words
128K
Min Operating Supply Voltage
4.5V
Max Operating Supply Voltage
5.5V
Min Operating Temperature
-20°C
Max Operating Temperature
80°C
Compliance
EU RoHS
Yes
HTS Code
8542320041
Schedule B
8542320040
ECCN
EAR99
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Lyontek LY621024GL-55LLE Datasheet
Download the complete datasheet for Lyontek LY621024GL-55LLE to view detailed technical specifications.
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