1M-bit asynchronous SRAM memory chip with 128K x 8 organization. Features a 55ns maximum access time and operates from a 3V typical supply voltage, with a range of 2.7V to 5.5V. Housed in a 32-pin TSOP-I Thin Small Outline Package for surface mounting, this component offers a 17-bit address bus and 8-bit word width. Designed for operation across a -40°C to 85°C temperature range.
PackageTSOP-I
MountingSurface Mount
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Technical Specifications
Lyontek LY62W1024LL-55LLIT technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | TSOP-I |
| Package Description | Thin Small Outline Package (Type I) |
| Lead Shape | Gull-wing |
| Pin Count | 32 |
| PCB | 32 |
| Package Length (mm) | 8 |
| Package Width (mm) | 18.4 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 1Mbit |
| Address Bus Width | 17bit |
| Maximum Access Time | 55ns |
| Timing Type | Asynchronous |
| Density in Bits | 1048576bit |
| Maximum Operating Current | 60mA |
| Typical Operating Supply Voltage | 3V |
| Number of Bits per Word | 8bit |
| Number of Ports | 1 |
| Number of Words | 128K |
| Min Operating Supply Voltage | 2.7V |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
Compliance
| EU RoHS | Yes |
| HTS Code | 8542320041 |
| Schedule B | 8542320040 |
| ECCN | EAR99 |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Lyontek LY62W1024LL-55LLIT Datasheet
Download the complete datasheet for Lyontek LY62W1024LL-55LLIT to view detailed technical specifications.
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