1M-bit synchronous SRAM chip, featuring a 128K x 8 configuration with a 24-bit address bus. Offers a maximum access time of 25 ns and a maximum clock rate of 20 MHz with SDR data rate architecture. Operates with dual 3.3V/5V supply voltages, ranging from 2.5V to 5.5V. Housed in an 8-pin SOIC N narrow body surface-mount package with gull-wing leads, measuring 4.9mm x 3.9mm x 1.25mm (Min). Suitable for operation between -40°C and 85°C.
PackageSOIC N
MountingSurface Mount
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Technical Specifications
Microchip 23LC1024-I/SN technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | SOIC N |
| Package Description | Small Outline IC Narrow Body |
| Lead Shape | Gull-wing |
| Pin Count | 8 |
| PCB | 8 |
| Package Length (mm) | 4.9 |
| Package Width (mm) | 3.9 |
| Package Height (mm) | 1.25(Min) |
| Mounting | Surface Mount |
| Density | 1Mbit |
| Address Bus Width | 24bit |
| Maximum Access Time | 25ns |
| Timing Type | Synchronous |
| Maximum Clock Rate | 20MHz |
| Data Rate Architecture | SDR |
| Density in Bits | 1048576bit |
| Maximum Operating Current | 10mA |
| Typical Operating Supply Voltage | 3.3|5V |
| Number of Bits per Word | 8bit |
| Number of Ports | 2 |
| Number of Words | 128K |
| Min Operating Supply Voltage | 2.5V |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | 60991 |
| EU RoHS | Yes |
| HTS Code | 8542320051 |
| Schedule B | 8542320050 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Microchip 23LC1024-I/SN Datasheet
Download the complete datasheet for Microchip 23LC1024-I/SN to view detailed technical specifications.
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