
1M-bit Parallel NOR Flash memory, organized as 128K x 8 words, features a 70ns maximum access time and operates from a 5V supply. This integrated circuit utilizes a sectored architecture with a boot block, supporting both bottom and top locations. The component is housed in a 32-pin Plastic Leaded Chip Carrier (PLCC) package with J-lead configuration for surface mounting, designed for operation between -40°C and 85°C.
Microchip AT29C010A-70JU-T technical specifications.
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | LCC |
| Package/Case | PLCC |
| Package Description | Plastic Leaded Chip Carrier |
| Lead Shape | J-Lead |
| Pin Count | 32 |
| PCB | 32 |
| Package Length (mm) | 14(Max) |
| Package Width (mm) | 11.5(Max) |
| Package Height (mm) | 2.8(Max) |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 1Mbit |
| Interface Type | Parallel |
| Maximum Operating Current | 50mA |
| Block Organization | Symmetrical |
| Architecture | Sectored |
| Programming Voltage | 4.75 to 5.25V |
| Timing Type | Asynchronous |
| Maximum Access Time | 70ns |
| Number of Words | 128K |
| Boot Block | Yes |
| Typical Operating Supply Voltage | 5V |
| Address Bus Width | 17bit |
| Location of Boot Block | Bottom|Top |
| Number of Bits per Word | 8bit |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| Cage Code | 60991 |
| EU RoHS | Yes |
| HTS Code | 8542320071 |
| Schedule B | 8542320070 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Microchip AT29C010A-70JU-T to view detailed technical specifications.
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