32-bit RISC microcontroller featuring a MIPS32 M4K core, operating at up to 80 MHz. This surface-mount device offers 512KB of Flash program memory and 64KB of RAM. It includes 53 programmable I/Os, 5 timers, and supports Ethernet, I2C (4 channels), SPI (3 channels), UART (6 channels), and USB (1 channel) interfaces. The 64-pin QFN EP package measures 9x9x0.88mm, with an operating temperature range of -40°C to 85°C.
PackageQFN EP
MountingSurface Mount
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Technical Specifications
Microchip PIC32MX675F512H-80I/MR technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | QFN |
| Package/Case | QFN EP |
| Package Description | Quad Flat No Lead Package, Exposed Pad |
| Lead Shape | No Lead |
| Pin Count | 64 |
| PCB | 64 |
| Package Length (mm) | 9 |
| Package Width (mm) | 9 |
| Package Height (mm) | 0.88 |
| Mounting | Surface Mount |
| Family Name | PIC32 |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Maximum Clock Rate | 80MHz |
| Maximum CPU Frequency | 80MHz |
| Device Core | MIPS32 M4K |
| Program Memory Type | Flash |
| Program Memory Size | 512KB |
| RAM Size | 64KB |
| Number of Programmable I/Os | 53 |
| Core Architecture | PIC |
| Programmability | Yes |
| Number of Timers | 5 |
| Interface Type | Ethernet/I2C/SPI/UART/USB |
| CAN | 0 |
| I2C | 4 |
| SPI | 3 |
| Ethernet | 1 |
| UART | 6 |
| USART | 0 |
| USB | 1 |
| I2S | 0 |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| ADC Channels | 16 |
| Number of ADCs | Single |
Compliance
| Cage Code | 60991 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | 3A991.a.2 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Microchip PIC32MX675F512H-80I/MR Datasheet
Download the complete datasheet for Microchip PIC32MX675F512H-80I/MR to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.