2M-bit NOR Flash memory with a parallel interface, featuring a 55ns maximum access time. This integrated circuit offers 256K x 8 or 128K x 16 word organization and a 17-bit address bus. Designed for surface mounting, it utilizes a 48-pin TSOP package with gull-wing leads and operates from a 3 to 3.6V programming voltage, typically at 3.3V. The memory architecture is sectored and asymmetrical, including a bottom boot block, with a maximum operating current of 10mA.
PackageTSOP
MountingSurface Mount
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Technical Specifications
Micron M29W200BB55N1T technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | TSOP |
| Package Description | Thin Small Outline Package |
| Lead Shape | Gull-wing |
| Pin Count | 48 |
| PCB | 48 |
| Package Length (mm) | 12 |
| Package Width (mm) | 18.4 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 2Mbit |
| Interface Type | Parallel |
| Maximum Operating Current | 10mA |
| Block Organization | Asymmetrical |
| Architecture | Sectored |
| Programming Voltage | 3 to 3.6V |
| Timing Type | Asynchronous |
| Maximum Access Time | 55ns |
| Number of Words | 256K/128K |
| Boot Block | Yes |
| Typical Operating Supply Voltage | 3.3V |
| Address Bus Width | 17bit |
| Location of Boot Block | Bottom |
| Number of Bits per Word | 8/16bit |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
Compliance
| Cage Code | 6Y440 |
| EU RoHS | No |
| HTS Code | 8542320071 |
| Schedule B | 8542320070 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Micron M29W200BB55N1T Datasheet
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