8M-bit NOR Flash memory with 1M x 8 organization, featuring parallel and serial interfaces. Operates at 3V/3.3V with a maximum access time of 11ns/50ns. This surface-mount component is housed in a 32-pin PLCC package with J-lead configuration. Supports asynchronous and synchronous timing, with a symmetrical, sectored architecture and boot block at the top. Maximum operating current is 60mA, with programming voltages ranging from 3 to 3.6V and 11.4 to 12.6V.
PackagePLCC
MountingSurface Mount
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Technical Specifications
Micron M50LPW080K5TG technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | LCC |
| Package/Case | PLCC |
| Package Description | Plastic Leaded Chip Carrier |
| Lead Shape | J-Lead |
| Pin Count | 32 |
| PCB | 32 |
| Package Length (mm) | 14.05(Max) |
| Package Width (mm) | 11.51(Max) |
| Package Height (mm) | 3.56(Max) - 0.38(Min) |
| Seated Plane Height (mm) | 3.56(Max) |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 8Mbit |
| Interface Type | Parallel|Serial |
| Maximum Operating Current | 60mA |
| Block Organization | Symmetrical |
| Architecture | Sectored |
| Programming Voltage | 3 to 3.6|11.4 to 12.6V |
| Timing Type | Asynchronous|Synchronous |
| Maximum Access Time | 11/50ns |
| Number of Words | 1M |
| Boot Block | Yes |
| Typical Operating Supply Voltage | 3|3.3V |
| Address Bus Width | 4/11bit |
| Location of Boot Block | Top |
| Number of Bits per Word | 8bit |
| Min Operating Temperature | -20°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | 6Y440 |
| EU RoHS | Yes |
| HTS Code | 8542320071 |
| Schedule B | 8542320070 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Micron M50LPW080K5TG Datasheet
Download the complete datasheet for Micron M50LPW080K5TG to view detailed technical specifications.
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