4Gbit Mobile LPDDR2 SDRAM chip, organized as 128Mx32, features a 32-bit data bus and operates at a maximum clock rate of 800 MHz. This surface-mount component utilizes a 168-pin Fine Pitch Ball Grid Array (FBGA) package with a 0.5mm pin pitch, measuring 12x12x0.31mm. It offers 8 internal banks, 16M words per bank, and a maximum access time of 10 ns, with a typical operating voltage of 1.8V. Operating temperature range is -30°C to 85°C.
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Micron MT42L128M32D1LF-25 WT:A technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 168 |
| PCB | 168 |
| Package Length (mm) | 12 |
| Package Width (mm) | 12 |
| Package Height (mm) | 0.31(Min) |
| Seated Plane Height (mm) | 0.65 |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 4Gbit |
| Type | Mobile LPDDR2 SDRAM |
| Organization | 128Mx32 |
| Data Bus Width | 32bit |
| Maximum Clock Rate | 800MHz |
| Number of Internal Banks | 8 |
| Number of Words per Bank | 16M |
| Maximum Access Time | 10ns |
| Density in Bits | 4294967296bit |
| Address Bus Width | 17bit |
| Typical Operating Supply Voltage | 1.8V |
| Max Operating Supply Voltage | 1.95V |
| Min Operating Supply Voltage | 1.7V |
| Min Operating Temperature | -30°C |
| Max Operating Temperature | 85°C |
| Cage Code | 6Y440 |
| EU RoHS | Yes |
| HTS Code | 8542320036 |
| Schedule B | 8542320023 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
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