DDR2 SDRAM memory chip, 4.5 Gbit density, organized as 64Mx72 with a 72-bit data bus width. Features a maximum clock rate of 667 MHz, 8 internal banks, and 8M words per bank. Operates at 1.8V typical supply voltage, with a 16-bit address bus. Packaged in a 255-pin BGA (Ball Grid Array) with surface mount configuration, measuring 32.1mm x 25.1mm x 2.03mm, and operating across a temperature range of -40°C to 85°C.
PackageBGA
MountingSurface Mount
Quick Jump:
Technical Specifications
Micross AS4DDR264M72PBG-5/XT technical specifications.
General
Basic Package Type
Ball Grid Array
Package Family Name
BGA
Package/Case
BGA
Package Description
Plastic Ball Grid Array
Lead Shape
Ball
Pin Count
255
PCB
255
Package Length (mm)
32.1(Max)
Package Width (mm)
25.1(Max)
Package Height (mm)
2.03(Max)
Pin Pitch (mm)
1.27
Package Material
Plastic
Mounting
Surface Mount
Density
4.5Gbit
Type
DDR2 SDRAM
Organization
64Mx72
Data Bus Width
72bit
Maximum Clock Rate
667MHz
Number of Internal Banks
8
Number of Words per Bank
8M
Maximum Access Time
0.45ns
Density in Bits
4831838208bit
Address Bus Width
16bit
Maximum Operating Current
850mA
Typical Operating Supply Voltage
1.8V
Max Operating Supply Voltage
1.9V
Min Operating Supply Voltage
1.7V
Min Operating Temperature
-40°C
Max Operating Temperature
85°C
Compliance
Cage Code
0LRZ0
EU RoHS
No
HTS Code
8542320036
Schedule B
8542320023
ECCN
EAR99
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Micross AS4DDR264M72PBG-5/XT Datasheet
Download the complete datasheet for Micross AS4DDR264M72PBG-5/XT to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.