256M bit DDR SDRAM memory chip, organized as 16Mx4, features a 4-bit data bus and a maximum clock rate of 266 MHz. This surface-mount component utilizes a 60-pin SOC BGA package with dimensions of 13mm x 8mm x 0.8mm, offering a 1.2mm maximum seated plane height and 1mm pin pitch. Operating at a typical supply voltage of 2.5V, it boasts 4 internal banks, each with 4M words, and a maximum access time of 0.75 ns. Environmental specifications include an operating temperature range of 0°C to 70°C.
PackageSOC BGA
MountingSurface Mount
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Technical Specifications
Mosel Vitelic V58C2256404S-S7 technical specifications.
General
| Package/Case | SOC BGA |
| Pin Count | 60 |
| PCB | 60 |
| Package Length (mm) | 13 |
| Package Width (mm) | 8 |
| Package Height (mm) | 0.8(Max) |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 256Mbit |
| Type | DDR SDRAM |
| Organization | 16Mx4 |
| Data Bus Width | 4bit |
| Maximum Clock Rate | 266MHz |
| Number of Internal Banks | 4 |
| Number of Words per Bank | 4M |
| Maximum Access Time | 0.75ns |
| Density in Bits | 268435456bit |
| Address Bus Width | 15bit |
| Maximum Operating Current | 300mA |
| Typical Operating Supply Voltage | 2.5V |
| Max Operating Supply Voltage | 2.7V |
| Min Operating Supply Voltage | 2.3V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
Compliance
| Cage Code | SFP67 |
| HTS Code | 8542320024 |
| Schedule B | 8542320015 |
| ECCN | EAR99 |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Mosel Vitelic V58C2256404S-S7 Datasheet
Download the complete datasheet for Mosel Vitelic V58C2256404S-S7 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.