256Mbit DDR SDRAM memory chip, organized as 8Mx8 with an 8-bit data bus. Features a 400 MHz maximum clock rate, 4 internal banks, and 2M words per bank. Operates at a typical 2.6V supply voltage, with a 0.65 ns maximum access time. Housed in a 60-pin SOC BGA package, measuring 13mm x 8mm x 0.8mm, designed for surface mounting.
PackageSOC BGA
MountingSurface Mount
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Technical Specifications
Mosel Vitelic V58C2256804S-S5 technical specifications.
General
Package/Case
SOC BGA
Pin Count
60
PCB
60
Package Length (mm)
13
Package Width (mm)
8
Package Height (mm)
0.8(Max)
Seated Plane Height (mm)
1.2(Max)
Pin Pitch (mm)
1
Package Material
Plastic
Mounting
Surface Mount
Density
256Mbit
Type
DDR SDRAM
Organization
8Mx8
Data Bus Width
8bit
Maximum Clock Rate
400MHz
Number of Internal Banks
4
Number of Words per Bank
2M
Maximum Access Time
0.65ns
Density in Bits
268435456bit
Address Bus Width
15bit
Maximum Operating Current
400mA
Typical Operating Supply Voltage
2.6V
Max Operating Supply Voltage
2.7V
Min Operating Supply Voltage
2.5V
Min Operating Temperature
0°C
Max Operating Temperature
70°C
Compliance
Cage Code
SFP67
HTS Code
8542320024
Schedule B
8542320015
ECCN
EAR99
Radiation Hardening
No
RoHS Versions
2002/95/EC
Datasheet
Mosel Vitelic V58C2256804S-S5 Datasheet
Download the complete datasheet for Mosel Vitelic V58C2256804S-S5 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.