256Mbit DDR SDRAM memory chip, organized as 8Mx8, featuring an 8-bit data bus and a 15-bit address bus. This surface-mount component operates at a maximum clock rate of 400 MHz with a typical supply voltage of 2.6V. Encased in a 60-pin TSOP-II package with gull-wing leads, it offers a density of 268,435,456 bits and a maximum access time of 0.65 ns. The chip supports 4 internal banks, each with 2M words, and operates within a temperature range of 0°C to 70°C.
PackageTSOP-II
MountingSurface Mount
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Technical Specifications
Mosel Vitelic V58C2256804S-T5 technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | TSOP-II |
| Package Description | Thin Small Outline Package (Type II) |
| Lead Shape | Gull-wing |
| Pin Count | 60 |
| PCB | 60 |
| Package Length (mm) | 22.22 |
| Package Width (mm) | 10.16 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.65 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 256Mbit |
| Type | DDR SDRAM |
| Organization | 8Mx8 |
| Data Bus Width | 8bit |
| Maximum Clock Rate | 400MHz |
| Number of Internal Banks | 4 |
| Number of Words per Bank | 2M |
| Maximum Access Time | 0.65ns |
| Density in Bits | 268435456bit |
| Address Bus Width | 15bit |
| Maximum Operating Current | 400mA |
| Typical Operating Supply Voltage | 2.6V |
| Max Operating Supply Voltage | 2.7V |
| Min Operating Supply Voltage | 2.5V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
Compliance
| Cage Code | SFP67 |
| HTS Code | 8542320024 |
| Schedule B | 8542320015 |
| ECCN | EAR99 |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Mosel Vitelic V58C2256804S-T5 Datasheet
Download the complete datasheet for Mosel Vitelic V58C2256804S-T5 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.