The 74AUP2G58DPJ is a dual majority logic gate from Nexperia, operating within a supply voltage range of 0.8V to 3.6V. It features a 10-pin TSSOP package and a temperature grade of AUTOMOTIVE, making it suitable for automotive applications. The device has a propagation delay of 24.1ns and is capable of handling a maximum operating temperature of 125C. It is compliant with AEC-Q100 standards and is part of the AUP/ULP/V family of logic ICs.
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Nexperia 74AUP2G58DPJ technical specifications.
| Max Operating Temperature | 125 |
| Number of Terminals | 10 |
| Min Operating Temperature | -40 |
| Terminal Position | DUAL |
| JEDEC Package Code | S-PDSO-G10 |
| Width | 3 |
| Length | 3 |
| Pin Count | 10 |
| Number of Functions | 2 |
| Temperature Grade | AUTOMOTIVE |
| Supply Voltage-Nom (Vsup) | 1.1 |
| Supply Voltage-Max (Vsup) | 3.6 |
| Supply Voltage-Min (Vsup) | 0.8 |
| Logic IC Type | MAJORITY LOGIC GATE |
| Family | AUP/ULP/V |
| Propagation Delay (tpd) | 24.1 |
| Number of Inputs | 3 |
| REACH | Compliant |
| Military Spec | False |
Download the complete datasheet for Nexperia 74AUP2G58DPJ to view detailed technical specifications.
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