The 74AUP2G97GFX is a dual majority logic gate from Nexperia with a maximum operating temperature of 125°C. It has 10 terminals and operates over a supply voltage range of 0.8V to 3.6V. The device is packaged in a 10-pin R-PDSO-N10 package and has a propagation delay of 22.2ns. It is suitable for use in automotive applications and is compliant with the AEC-Q100 standard.
Nexperia 74AUP2G97GFX technical specifications.
| Max Operating Temperature | 125 |
| Number of Terminals | 10 |
| Min Operating Temperature | -40 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDSO-N10 |
| Width | 1 |
| Length | 1.7 |
| Pin Count | 10 |
| Number of Functions | 1 |
| Temperature Grade | AUTOMOTIVE |
| Supply Voltage-Nom (Vsup) | 1.1 |
| Supply Voltage-Max (Vsup) | 3.6 |
| Supply Voltage-Min (Vsup) | 0.8 |
| Logic IC Type | MAJORITY LOGIC GATE |
| Family | AUP/ULP/V |
| Propagation Delay (tpd) | 22.2 |
| Number of Inputs | 3 |
| REACH | Compliant |
| Military Spec | False |
No datasheet is available for this part.
