The Nexperia 74HC107PW,112 is a dual 2-bit J-K flip-flop with a maximum operating temperature of 125°C. It has 14 terminals and a JEDEC package code of R-PDSO-G14. The device operates within a supply voltage range of 2V to 6V and has a propagation delay of 48ns. It is suitable for use in automotive applications and has a load capacitance of 50pF.
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Nexperia 74HC107PW,112 technical specifications.
| Max Operating Temperature | 125 |
| Number of Terminals | 14 |
| Min Operating Temperature | -40 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDSO-G14 |
| Width | 4.4 |
| Length | 5 |
| Pin Count | 14 |
| Number of Functions | 2 |
| Temperature Grade | AUTOMOTIVE |
| Supply Voltage-Nom (Vsup) | 5 |
| Supply Voltage-Max (Vsup) | 6 |
| Supply Voltage-Min (Vsup) | 2 |
| Logic IC Type | J-K FLIP-FLOP |
| Family | HC/UH |
| Propagation Delay (tpd) | 48 |
| Number of Bits | 2 |
| Load Capacitance | 50 |
| Output Polarity | COMPLEMENTARY |
| Trigger Type | NEGATIVE EDGE |
| fmax-Min | 60 |
| HTS Code | 8542.39.00.01 |
| REACH | Compliant |
| Military Spec | False |
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