The 74LV132PW-Q100J is a dual NAND gate IC from Nexperia, featuring a 14-pin TSSOP package. It operates over a temperature range of -40°C to 125°C and is compliant with AEC-Q100. The device has a propagation delay of 43ns and can handle supply voltages from 1V to 5.5V. It is suitable for use in automotive applications.
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Technical Specifications
Nexperia 74LV132PW-Q100J technical specifications.
General
| Max Operating Temperature | 125 |
| Number of Terminals | 14 |
| Min Operating Temperature | -40 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDSO-G14 |
| Width | 4.4 |
| Length | 5 |
| Pin Count | 14 |
| Number of Functions | 4 |
| Temperature Grade | AUTOMOTIVE |
| Supply Voltage-Nom (Vsup) | 3.3 |
| Supply Voltage-Max (Vsup) | 5.5 |
| Supply Voltage-Min (Vsup) | 1 |
| Logic IC Type | NAND GATE |
| Family | LV/LV-A/LVX/H |
| Propagation Delay (tpd) | 43 |
| Number of Inputs | 2 |
| Screening Level | AEC-Q100 |
Compliance
| REACH | Compliant |
| Military Spec | False |
Datasheet
Nexperia 74LV132PW-Q100J Datasheet
Download the complete datasheet for Nexperia 74LV132PW-Q100J to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.