PackageTSSOP
PolarityInverting
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Technical Specifications
Nexperia 74LVC138APW,112 technical specifications.
General
| Logic Family | LVC |
| Logic Function | Decoder/Demultiplexer |
| Process Technology | CMOS |
| Demultiplexing Capability | 1-of-8 |
| Number of Elements per Chip | 1 |
| Number of Element Inputs | 3 |
| Number of Element Outputs | 8 |
| Polarity | Inverting |
| Tolerant I/Os | 5 InputsV |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 125°C |
| Pin Count | 16 |
| Package/Case | TSSOP |
Compliance
| RoHS | Yes |
| RoHS Version | 2011/65/EU, 2015/863 |
Datasheet
Nexperia 74LVC138APW,112 Datasheet
Download the complete datasheet for Nexperia 74LVC138APW,112 to view detailed technical specifications.
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