Pyramid
P4C1256-55CMB
Standard SRAM, 32KX8, 55ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, SIDE BRAZED, DIP-28
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Technical Specifications
Pyramid P4C1256-55CMB technical specifications.
General
Max Operating Temperature
125
Number of Terminals
28
Min Operating Temperature
-55
Terminal Position
DUAL
JEDEC Package Code
R-CDIP-T28
Width
7.62
Pin Count
28
Number of Functions
1
Temperature Grade
MILITARY
Supply Voltage-Nom (Vsup)
5
Supply Voltage-Max (Vsup)
5.5
Supply Voltage-Min (Vsup)
4.5
Number of Words
32768
Number of Words Code
32000
Memory IC Type
STANDARD SRAM
Parallel/Serial
PARALLEL
Access Time-Max
55
Screening Level
MIL-STD-883 Class B
Compliance
RoHS
No
Eccn Code
3A001.A.2.C
Lead Free
No
HTS Code
8542.32.00.41
REACH
Compliant
Military Spec
True
Datasheet
Pyramid P4C1256-55CMB Datasheet
Download the complete datasheet for Pyramid P4C1256-55CMB to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.