Asynchronous SRAM chip, 64K-bit density, organized as 8K words by 8 bits. Features a maximum access time of 35 ns and operates from a 5V supply voltage (4.5V to 5.5V). This through-hole component is housed in a 28-pin Ceramic Dual In Line Package Wide Body (CDIP W) with a 2.54mm pin pitch. Designed for a wide operating temperature range from -55°C to 125°C.
PackageCDIP W
MountingThrough Hole
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Technical Specifications
Pyramid P4C164-35DWMBLF technical specifications.
General
Basic Package Type
Through Hole
Package Family Name
DIP
Package/Case
CDIP W
Package Description
Ceramic Dual In Line Package Wide Body
Lead Shape
Through Hole
Pin Count
28
PCB
28
Package Length (mm)
37.85(Max)
Package Width (mm)
15.49(Max)
Package Height (mm)
4.37(Max)
Seated Plane Height (mm)
5.89(Max)
Pin Pitch (mm)
2.54
Package Material
Ceramic
Mounting
Through Hole
Density
64Kbit
Address Bus Width
13bit
Maximum Access Time
35ns
Timing Type
Asynchronous
Density in Bits
65536bit
Maximum Operating Current
150mA
Typical Operating Supply Voltage
5V
Number of Bits per Word
8bit
Number of Ports
1
Number of Words
8K
Min Operating Supply Voltage
4.5V
Max Operating Supply Voltage
5.5V
Min Operating Temperature
-55°C
Max Operating Temperature
125°C
Compliance
Cage Code
3DTT2
EU RoHS
Yes
HTS Code
8542320041
Schedule B
8542320040
ECCN
3A001.a.2.c
Automotive
No
AEC Qualified
No
PPAP
No
RoHS Versions
2002/95/EC
Datasheet
Pyramid P4C164-35DWMBLF Datasheet
Download the complete datasheet for Pyramid P4C164-35DWMBLF to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.