FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 9 32-Pin PLCC Tube
PackagePLCC
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Technical Specifications
Renesas 72221L15JGI technical specifications.
General
| Density | 9Kbit |
| Timing Type | Synchronous |
| Configuration | Dual |
| Maximum Clock Rate | 66.7MHz |
| Bus Directional | Uni-Directional |
| Maximum Operating Current | 35mA |
| Maximum Access Time | 10ns |
| Typical Operating Supply Voltage | 5V |
| Organization | 1Kx9 |
| Data Bus Width | 9bit |
| Expansion Support | Yes |
| Density in Bits | 9216bit |
| Min Operating Supply Voltage | 4.5V |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| Pin Count | 32 |
| Package/Case | PLCC |
| Package Family Name | LCC |
Compliance
| RoHS | Yes |
| RoHS Version | 2011/65/EU, 2015/863 |
Datasheet
No datasheet is available for this part.